Q
Hiring companyQualcomm
Verified 2 days ago
NPU AI Processor Synthesis Lead
Bangalore,,India Full-time
About the role
Hardware Engineering - Synthesis Team at Qualcomm drives synthesis and timing closure for Neural Processing Unit (NPU) IP in cutting‑edge SoCs. The lead owns RTL‑to‑gate synthesis, develops scripts, and optimizes performance, power, and area while collaborating with architecture, RTL, and physical design teams. Bangalore, on-site, full‑time role with mentorship responsibilities and advanced EDA tool innovation.
What you’ll do
- Lead RTL‑to‑gate synthesis for NPU IP using Synopsys Design Compiler and Cadence Genus
- Develop and maintain hierarchical and flat synthesis scripts and flows
- Drive pre‑layout and post‑layout timing closure across voltage and process corners
- Collaborate with STA teams to resolve setup/hold violations
- Apply physical‑aware synthesis techniques to meet aggressive PPA targets
- Validate and maintain SDC constraints for clocks, I/O delays, and multi‑cycle paths
- Mentor junior engineers and promote best practices in synthesis and timing
What you’ll bring
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering or related field and 3+ years hardware engineering experience
- Master's degree in Computer Science, Electrical/Electronics Engineering or related field and 2+ years hardware engineering experience
- PhD in Computer Science, Electrical/Electronics Engineering or related field and 1+ year hardware engineering experience
Skills
RTL‑to‑gate synthesisTiming closurePPA optimizationEDA tool scriptingPhysical‑aware synthesisConstraint managementCross‑functional collaborationMentorship
Education
- Bachelor's
- Master's
- PhD