Q
Hiring companyQualcomm
Verified 2 days ago
NPU/AI Processor Synthesis Staff, Sr Staff, Technical Lead
Bangalore, India Full-time On-site
About the role
Qualcomm Hardware Engineering team drives cutting-edge NPU and AI processor development. The Synthesis Lead owns RTL-to-gate synthesis, timing closure, and PPA optimization for NPU IP, collaborating with architecture, RTL, and physical design groups. Bangalore, India, on-site, full-time role with leadership of junior engineers and cross‑functional coordination.
What you’ll do
- Lead RTL‑to‑gate synthesis for NPU IP and subsystems
- Develop and maintain synthesis scripts and hierarchical flows
- Drive pre‑layout and post‑layout timing closure across corners
- Optimize designs for performance, power, and area targets
- Validate and maintain SDC constraints
- Perform LEC, clock/power checks, and linting
- Mentor junior engineers and promote best practices
What you’ll bring
- Bachelor's degree in Electrical/Electronics Engineering or related field
- 4+ years ASIC hardware engineering experience
- Advanced proficiency with Synopsys Design Compiler and Cadence Genus
- Expertise in STA tools such as PrimeTime
- Scripting in Tcl, Perl, Python
- Low‑power design using UPF/CPF flows
- Leadership of synthesis teams
Skills
ASIC synthesisTiming closureLow‑power designTcl scriptingPython automationSTA toolsPhysical‑aware synthesisCross‑functional leadership