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Senior Engineer IP Verification
About the role
Micron’s Analog & Mixed Signal Verification team drives the reliability of next‑generation DRAM. The Senior Engineer writes Verilog A/MS models, builds SPICE testbenches, and develops UVM/PSL assertions to validate complex analog/mixed‑signal circuits. Based in Bengaluru, India, the role is on‑site with a focus on DRAM memory verification and AI‑tool integration.