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Hiring companyAstera Labs
Active listing
Principal Digital Design Engineer
Bengaluru, Karnataka, India
About the role
Silicon Engineering team at Astera Labs builds purpose‑built connectivity solutions for AI and cloud infrastructure. The Principal Digital Design Engineer leads architecture and RTL implementation of high‑performance digital IPs and SoC subsystems, collaborating with verification, physical design, firmware and product teams to deliver silicon across multiple programs. Bengaluru, India, on‑site role, relocation assistance available.
What you’ll bring
- 10+ years digital design experience
- Expertise in Verilog/SystemVerilog RTL development
- Experience delivering multiple silicon tape‑outs
- Strong knowledge of PPA optimization and design sign‑off flows
- Proficiency with synthesis, lint, CDC/RDC, STA tools
Nice to have
- Experience with Compute Express Link (CXL) and PCIe
- Design of high‑speed Ethernet and SerDes interfaces
- Knowledge of cache coherency protocols and AI accelerator SoCs
- Familiarity with DFT and low‑power design techniques
- Proficiency in Python, Tcl, Perl or Shell scripting
Skills
RTL designMicroarchitectureHigh‑speed interconnectsSoC integrationDesign for testLow‑power techniquesVerification collaborationSynthesis flow