Principal Digital Design Engineer

About the role

Digital Design Team at NXP Semiconductors builds advanced digital logic blocks for ASIC and FPGA products. The Principal Digital Design Engineer leads RTL development, verification, synthesis, and post‑silicon validation, collaborating with verification, physical design, and firmware groups. Bangalore office, on-site work model, relocation assistance available.

What you’ll do

• Develop and optimize RTL code for complex digital blocks
• Create and execute testbenches and verification plans
• Perform synthesis, timing analysis, and area optimization
• Debug RTL, gate, and silicon level issues
• Collaborate with verification, physical design, and firmware teams
• Participate in design and code reviews
• Support post‑silicon validation and bring‑up activities

What you’ll bring

• 10+ years digital design experience
• Proficiency in Verilog/SystemVerilog/VHDL
• Experience with ModelSim/VCS/Xcelium
• Synthesis using Design Compiler/Genus
• Static timing analysis with PrimeTime
• UVM verification methodology
• Python or TCL scripting
• ASIC/FPGA design flow

Nice to have

Bachelor's or Master's in Electrical/Electronics/VLSI/Computer Engineering

Education

Bachelor's or Master's in Electrical/Electronics/VLSI/Computer Engineering