Principal DFT Engineer

About the role

Rambus is seeking a Principal DFT Engineer to join its DFT team in Bangalore, working on high-speed mixed signal and PMIC silicon designs. You will own full DFT for mixed signal designs, create and deploy DFT IPs, debug failures, perform low coverage analysis for stuck-at and at-speed, and collaborate with Test Engineering, EDA R&D, and cross-functional teams to improve yield and silicon bring-up. The role is full-time and hybrid, with an expectation of at least three days onsite per week.

What you’ll do

• Perform full DFT of mixed signal design
• Create DFT IPs and deploy them
• Debug different failures
• Perform low coverage analysis for both stuck-at and at-speed
• Work closely with cross-functional teams to develop and verify DFT structures and constraints
• Work closely with Test Engineering for test program development, silicon bring-up, diagnosis, yield improvement, and silicon debug
• Work closely with EDA R&D teams to propose and implement new features
• Apply hands-on scripting and flow deployment skills

What you’ll bring

• Tech / BE / ME / M Tech degree
• 8-12 years of relevant hands-on experience in Design for Test (DFT)
• Clear understanding of key DFT concepts: scan compression (EDT), scan stitching, fault models (stuck-at, delay tests, small delay, etc.), EDT, OCC
• Understanding of SOC DFT architecture
• Basic understanding of DFT for mixed signal designs
• Understanding of synthesis, RTL coding, and STA
• Hands-on experience with scripting and flow deployment
• Understanding of MBIST and LBIST

Nice to have

• Hands-on experience with Tessent ATPG tool
• Silicon debug skill and sign off
• Experience in at least one scripting language such as PERL, Python, TCL, or Shell
• Self-motivated team player with strong problem-solving skills
• Excellent written and verbal communication skills

Skills

Benefits

Competitive compensation package including base salary, bonus, equity, and employee benefits

Education

Tech /BE/ME/M Tech