Q
Hiring companyQualcomm
Verified 2 days ago
NPU/AI Processor Synthesis Sr Staff Engineer
Bangalore, Karnataka, India On-site
About the role
Hardware Engineering team at Qualcomm focuses on cutting-edge SoC AI capabilities. The Sr Staff Engineer leads RTL-to-gate synthesis and timing closure for NPU IP, develops scripts, and mentors junior engineers. Bangalore, India, on-site, hybrid schedule with occasional offsite collaboration.
What you’ll do
- Lead RTL-to-gate synthesis for NPU IP
- Develop and maintain synthesis flows and scripts
- Drive pre/post-layout timing closure across corners
- Optimize designs for performance, power, area
- Validate and manage SDC constraints
- Collaborate with RTL, DFT, and physical design teams
- Perform LEC, CLP, and lint checks
- Mentor junior engineers
What you’ll bring
- 6+ years ASIC hardware engineering
- Master's or PhD optional with reduced experience
- Proficiency with Synopsys Design Compiler and Cadence Genus
- Experience with STA tools like PrimeTime
- Advanced Tcl/Perl/Python scripting
- Low-power design using UPF/CPF
- Leadership of synthesis teams
Skills
ASIC synthesisTiming closureLow-power designTcl scriptingPython automationSTA analysisPhysical-aware synthesisCross-functional collaboration
Education
Bachelor's