Principal DFT Engineer

About the role

Renesas seeks a Principal DFT Engineer to drive end-to-end design-for-test execution for advanced SoCs and MCUs in the automotive, industrial, infrastructure, and IoT sectors. The role involves defining test architecture, managing the full DFT lifecycle from RTL integration to silicon bring-up, and mentoring engineering teams. This is a remote position based in Hyderabad, India.

What you’ll do

• Define and drive SoC-level DFT architecture and test strategy.
• Own the complete DFT flow including RTL design, verification, scan insertion, and signoff.
• Drive silicon bring-up, debug, diagnosis, and production test enablement.
• Develop and deploy scalable DFT methodologies and automation frameworks.
• Collaborate with Design, Verification, Physical Design, and Test Engineering teams.
• Provide technical leadership and mentor engineers across projects.

What you’ll bring

• B.E./B.Tech., M.E./M.Tech., or Ph.D. in Electronics or related field.
• 15+ years of hands-on DFT experience with successful delivery of multiple SoCs.

Nice to have

• Proven expertise in DFT Architecture, Test Planning, and Test Strategy.
• Deep knowledge of Scan Insertion, ATPG, MBIST, LBIST, JTAG/IJTAG, and GLS Signoff.
• Experience with silicon bring-up, debug, diagnosis, and yield improvement.
• Strong hands-on experience with Tessent, Genus/Fusion Compiler, VCS/Xcelium, and Conformal/Formality.
• Proficiency in automation and scripting using Python, TCL, Perl, or Shell.

Skills

Benefits

Competitive benefits package alongside salary

Education

B.E./B.Tech., M.E./M.Tech., or Ph.D. in Electronics or related field.