Principal ASIC Design Engineer

About the role

Principal ASIC Design Engineer at onsemi leads the design and verification of digital subsystems for the cutting‑edge Treo platform. With a strong background in SoC architecture, RTL design, and functional safety, the role drives innovation, standardization, and high‑performance solutions across automotive, industrial, and AI data‑center markets. The engineer collaborates with cross‑functional teams, plans verification strategies, writes high‑quality documentation, and ensures IP meets ASIL requirements. Proficiency in Verilog/SystemVerilog, Python, and industry tools such as Lint, CDC, RDC, and Design Compiler is essential. Candidates bring at least seven years of semiconductor product development experience, a bachelor’s degree in electronics or related field, and a proven track record of leading small projects and delivering robust, low‑latency, power‑efficient designs.

What you’ll do

• Micro architect, implement and verify digital Sub-System
• Collaborate with cross-functional teams on requirements
• Lead design and verification planning, ensure testability
• Hands‑on RTL coding and automation scripting
• Ensure IP meets ASIL requirements
• Drive innovation and standardization

What you’ll bring

• BE/ME in electronics or related field
• 7+ years semiconductor product dev experience
• Expertise in SoC architecture, IP selection, RTL design
• Strong grasp of digital design principles (FSM, timing, logic)
• Proficiency in Verilog/SystemVerilog
• Familiar with Lint, CDC, RDC, Design Compiler
• Experience with APB, AHB, AXI, SPI, I2C, DMA interfaces
• Design techniques: pipelining, low latency, power optimization
• High-quality technical documentation writing
• Proficient in Python and PERL scripting
• Experience leading small projects
• Specification writing from high-level requirements
• Understanding of DFT and Functional Safety (FuSa)
• Analytical debugging skills for verification

Nice to have

• BE/ME in electronics or related field
• 7+ years semiconductor product dev experience
• Expertise in SoC architecture, IP selection, RTL design
• Strong grasp of digital design principles (FSM, timing, logic)
• Proficiency in Verilog/SystemVerilog
• Familiar with Lint, CDC, RDC, Design Compiler
• Experience with APB, AHB, AXI, SPI, I2C, DMA interfaces
• Design techniques: pipelining, low latency, power optimization
• High-quality technical documentation writing
• Proficient in Python and PERL scripting
• Experience leading small projects
• Specification writing from high-level requirements
• Understanding of DFT and Functional Safety (FuSa)
• Analytical debugging skills for verification

Skills

Benefits

• Competitive benefits package
• Friendly team‑oriented environment
• Opportunities for learning and growth
• Support for volunteer and charitable programs

Education

Bachelor's