Active listing
Silicon Physical Design Engineer III, STA, Cloud Silicon
About the role
AI and Infrastructure team at Google develops custom silicon that powers Google’s direct‑to‑consumer products and AI platforms. The engineer defines and drives physical design static timing analysis (STA) methodologies, owns STA for design partitions, and closes timing and power targets while contributing to libraries and code reviews. Bengaluru, Karnataka, India, on-site, hybrid schedule with 3 days onsite, relocation assistance available.
What you’ll do
- Define and implement STA methodologies for physical design
- Own STA for one or more design partitions or top‑level blocks
- Drive closure of timing and power consumption targets
- Contribute to design methodology, libraries, and code reviews
- Define STA constraint rule sets for physical design engineers
What you’ll bring
- Bachelor's in Electrical, Computer Engineering or related field
- 4+ years coding/scripting (Python, Tcl)
- 4+ years physical design flows with STA focus
- Experience with ECO flows and high‑speed timing convergence
- Familiarity with PrimeTime or Tempus
Skills
Benefits
- Health, dental, and vision coverage
- 401(k) matching
- Generous paid time off