Verified today
Lead Design Verification Engineer
About the role
FPGA Verification Team at Altera builds robust verification environments to ensure FPGA designs meet microarchitecture specifications. The Lead Design Verification Engineer creates verification plans, develops test benches, runs simulations, and drives debug to close coverage gaps. Works onsite in Penang, Malaysia and Bengaluru, India, collaborating with architects and physical design teams.
What you’ll do
- Develops FPGA verification plans and test benches
- Executes simulation models and analyzes power/timing
- Debugs and resolves failing tests in pre‑silicon environment
- Collaborates with RTL, architecture, and physical design teams
- Documents verification strategies and drives technical reviews
- Maintains and improves verification infrastructure
What you’ll bring
- BS/MS/PhD in Electrical or Computer Science Engineering with 8+ years experience
- Pre‑silicon validation/verification expertise
- Proficiency with OVM/UVM and SystemVerilog
- DDR and GPIO protocol verification experience
- Full verification lifecycle knowledge
- Developing and maintaining test suites and methodologies
- FPGA architecture or prototyping background
Skills
Education
BS/MS/PhD in Electrical or Computer Science Engineering