Back to jobs
G
Hiring companyGoogle

Verified today

Senior RTL Engineer, Google Cloud

Bengaluru, Karnataka, India

About the role

The Silicon Senior RTL Engineer role at Google Cloud focuses on shaping the future of AI/ML hardware acceleration by developing custom silicon solutions for Google's TPU (Tensor Processing Unit) technology. Based in Bengaluru, Karnataka, India, you will own microarchitecture and RTL implementation of complex IPs and subsystems, verify complex digital designs with a focus on TPU architecture, and collaborate with architecture, verification, power, performance, and physical design teams to deliver next-generation data center accelerators. The role involves solving technical problems with innovative logic solutions while evaluating design options for complexity, performance, power, and area.

What you’ll do

  • Own microarchitecture and implementation of complex IPs and subsystems
  • Take ownership of RTL implementation and quality checks of one or more modules
  • Contribute to design methodology, libraries, debug, code review in coordination with other IPs Design Verification (DV) teams and physical design teams
  • Identify and drive Power, Performance and Area (PPA) improvements for the modules owned
  • Participate in synthesis, timing/power closure, and FPGA/silicon bring-up

What you’ll bring

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
  • 8 years of experience in Application-Specific Integrated Circuit/System on a chip (ASIC/SoC) development with Verilog/SystemVerilog
  • Experience in micro-architecture and design of IPs and subsystems
  • Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT)

Nice to have

  • Experience with programming languages (e.g., Python, C/C++ or Perl)
  • Experience in SoC designs and integration flows
  • Knowledge of arithmetic units, processor design, accelerators, bus architectures, fabrics/NoC or memory hierarchies
  • Knowledge of high performance and low power design techniques

Skills

Verilog/SystemVerilogASIC/SoC DevelopmentMicro-architecture DesignRTL ImplementationDesign VerificationSynthesisTiming/Power AnalysisDFT

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.