Verified today
Senior Memory Circuit Design Verification Engineer
About the role
Senior Verification Engineer with 4-8 years of experience in memory design, responsible for RTL verification, gate-level simulation, testbench development, and AI-assisted automation for DDR5/LPDDR5/DDR6/LPDDR6 products.
What you’ll do
- Guide verification effort
- Support design projects
- Develop test cases
- Develop methodology
- Collaborate on AI automation
What you’ll bring
- SystemVerilog
- UVM
- Verilog
- gate-level simulation
- AI-assisted tools
Skills
Education
Bachelors