Verified 2 days ago
Senior Staff DFT Engineer, NPU/AI Processor
About the role
Qualcomm Hardware Engineering team builds cutting‑edge ASICs and AI processors. The Senior Staff DFT Engineer designs, implements and verifies scan insertion, ATPG, and timing test flows for NPU/AI products, collaborates across global design groups, and leads complex yield improvement projects. Remote work from India, relocation not required.
What you’ll do
- Plan and design DFT architectures for NPU/AI processors
- Develop and integrate scan insertion and ATPG strategies
- Define and verify test mode timing constraints and corrective actions
- Create and maintain automation scripts for test vector generation and analysis
- Collaborate with cross‑functional teams to resolve yield and timing issues
- Mentor junior engineers and drive best practices in DFT methodology
What you’ll bring
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering or related field
- 3+ years hardware engineering experience (or Master's with 2+ years, PhD with 1+ year)
- 11+ years ASIC/DFT experience
- Expertise in scan insertion, ATPG, coverage analysis, timing test constraints
- Proficiency in Perl or shell scripting
- Experience with DFT tools such as Synopsys TetraMax/DFTMax, Cadence Encounter Test
- Knowledge of RTL lint tools (e.g., SpyGlass) and DRC rules