About the role

Data Center Engineering Business Unit at Marvell India Pvt Ltd, Bangalore builds advanced SoC DFT solutions for custom and compute businesses. The Senior Staff Engineer leads scan, MBIST, OCC, and boundary‑scan flow integration, drives ATPG pattern generation, and collaborates with RTL, synthesis, and physical teams to ensure seamless DFT integration. Based in Bangalore, the role is on‑site with a focus on global DFT ownership and customer delivery.

What you’ll do

Develop & integrate scan, MBIST, OCC, boundary‑scan flows
Drive ATPG pattern generation & compression
Collaborate with RTL, synthesis, physical teams
Perform SpyGlass DFT checks
Validate pre‑silicon DFT features & support post‑silicon bring‑up
Optimize test methodologies for cost, coverage, yield

What you’ll bring

8-10 years DFT ASIC/SoC
Scan insertion & ATPG tools (Synopsys, Cadence, Mentor)
MBIST/OCC validation flows
Hierarchical DFT & SDC constraint management
IEEE 1687 IJTAG standards
SpyGlass DFT rules
Digital & Logic Design fundamentals
RTL, synthesis, STA, physical design flows

Skills

DFTATPGSynopsysCadenceMentorSpyGlassTCLPythonShell

Benefits

Competitive compensation
Inclusive work environment
Growth opportunities
Collaborative culture
Transparency

Education

Bachelor’s/Master’s in Electrical/Electronics Engineering, VLSI