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Hiring companyMicron Technology

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Senior Memory Circuit Design Verification Engineer

Hyderabad, India Full-time On-site

About the role

Senior Memory Circuit Design Verification Engineer at Micron Technology focuses on executing FastSpice-based verification for DRAM and HBM critical timing sign-off, performing full-chip and block-level analog SPICE simulations across PVT corners, simulating and debugging pre-silicon designs, developing SPICE and mixed-signal testbenches, creating test cases to improve functional coverage, running regressions, collaborating with cross-geo teams, and documenting verification results to drive verification closure.

What you’ll do

  • Execute FastSpice-based verification (PrimeSim / FineSim / SpectreFx) for DRAM and HBM critical timing sign-off within assigned scope.
  • Perform full-chip and block-level analog SPICE simulations and analysis across PVT corners and speed grades.
  • Simulate, analyze, and debug pre-silicon designs to identify and resolve functional and timing issues.
  • Develop and maintain SPICE and mixed-signal testbenches at block and full-chip levels.
  • Create test cases and stimulus to improve functional coverage for DRAM and emerging memory architectures.
  • Run regressions, analyze results, and drive verification closure.
  • Collaborate with cross-geo teams (US, Japan, Mexico) to execute verification plans and align on technical issues.
  • Document verification results and contribute to continuous improvement of verification methodologies.

What you’ll bring

Minimum 3+ years of experience in Memory Circuit Design Verification.

Nice to have

  • M.Tech / MS in Electrical or Electronics Engineering is preferred.
  • Prior experience in DRAM / HBM / SRAM memory products is a strong plus.

Skills

Solid understanding of analog and mixed-signal circuits and full-chip verification flows.Hands-on experience with FastSpice tools such as PrimeSim, FineSim, HSPICE, or SpectreFx.Good knowledge of DRAM memory architecture and critical timing concepts.Experience with SystemVerilog / UVM-based verification methodologies.Familiarity with tools such as Virtuoso, Xcelium, SimVision, and WaveView.Scripting experience using Python or Perl is a plus.Strong debugging, analytical, and communication skills.