Senior Principal Analog Lead

About the role

Senior Principal Analog Lead – HBM PHY at Marvell’s Central Engineering AMS-IP team drives next‑generation HBM PHY analog and mixed‑signal solutions for AI, HPC, and hyperscale systems. The role owns PHY circuit architecture, leads high‑speed block design, defines SI/PI budgets, collaborates with logic, physical, packaging, and system teams, and drives silicon bring‑up and post‑silicon characterization. Bangalore, India, onsite with hybrid flexibility.

What you’ll do

• Own analog/mixed‑signal architecture of HBM PHY
• Lead design of IO drivers, receivers, equalization, clock distribution
• Define SI/PI/jitter budgets
• Co‑design training flows and calibration algorithms with logic architects
• Drive HBM4 silicon implementation
• Collaborate across physical, packaging, SI/PI, system teams
• Ensure robust design across PVT corners
• Lead design reviews, modeling, simulation
• Drive post‑silicon bring‑up, characterization, debug
• Engage memory vendors for interface compliance

What you’ll bring

• 15+ years analog/mixed‑signal IC design
• Advanced node HBM PHY/SerDes
• High‑speed IO design (TX/RX, equalization, clocking)
• DLL/PLL/CPR/CDR expertise
• Signal integrity, power integrity, jitter/noise analysis
• Packaging (2.5D/3D, interposers)
• System‑level AMS modeling
• Cross‑functional architecture leadership

Skills

Benefits

• Competitive compensation
• Industry‑leading AI/HPC silicon platforms
• High visibility role
• Deep technical ownership
• Inclusive work environment