Senior Engineer, DEG Layout

About the role

Micron Technology – Memory and Storage Engineering team designs advanced memory solutions. The Senior Engineer creates and verifies analog, mixed-signal, and digital block layouts, uses auto‑placement tools, and leads layout quality and delivery. Bengaluru, India, on-site.

What you’ll do

• Design and develop critical analog, mixed‑signal, and digital block layouts
• Perform layout verification (LVS, DRC, antenna, etc.) and documentation
• Develop digital block layouts using auto‑placement and routing tools
• Create basic skill scripts for automation
• Deliver block‑level layouts on schedule with quality standards
• Lead planning, estimation, scheduling, and delegation across projects
• Mentor team members on sub‑block layouts and review work
• Coordinate with global engineering teams to ensure project success

What you’ll bring

• 5-8 years analog/custom layout design
• Expertise in Cadence VLE/VXL
• Mentor Calibre DRC/LVS experience
• Design of blocks like PLL, ADC, DAC, LDO
• Understanding of analog layout fundamentals
• Ability to assess layout effects on speed, power, area
• Physical verification problem‑solving skills
• Strong verbal and written communication

Skills