Verified today
Senior Engineer, DEG Layout
About the role
Micron Technology Layout Engineering team designs and develops critical analog, mixed-signal, and custom digital blocks for advanced memory products. The Senior Engineer creates and verifies chip layouts, leads block-level delivery, mentors junior staff, and leverages AI tools to streamline layout effort. Bengaluru, India, on-site.
What you’ll do
- Develop layout designs for analog, mixed-signal, and digital blocks
- Perform LVS, DRC, antenna, shielding, matching, and other verification checks
- Create digital block layouts using auto placement and routing tools
- Estimate area/time, schedule, and delegate tasks to meet project timelines
- Guide and review sub‑block layouts of team members
- Contribute to project management and cross‑team communication
- Utilize AI tools to reduce layout effort
What you’ll bring
- 5-8 years analog/custom layout design experience
- Expertise with Cadence VLE/VXL and Mentor Calibre DRC/LVS
- Designed layouts for blocks such as PLL, ADC, DAC, LDO, Bandgap, etc.
- Strong understanding of analog layout fundamentals and effects
- Proficient in auto placement and routing tools
- Basic skill coding and automation experience
- Excellent communication with global engineering teams