Verified 4 days ago
Senior Engineer Verification
About the role
Verification Engineering team at Infineon Technologies focuses on analog and mixed-signal verification for power and IoT solutions. The Senior Engineer develops SV RNM models, builds automatic checkers, and verifies analog vectors at SoC level using UVM testbenches and DMS flows. Bangalore, India, on-site work model, relocation assistance available.
What you’ll do
- Develop SV RNM models for analog blocks such as ADC, buck‑boost controllers, LDOs
- Verify SV RNM models against schematics and analog vectors at SoC level
- Create and maintain automatic verification checkers
- Collaborate with design teams to integrate verification flows
- Automate verification tasks using scripting languages
What you’ll bring
- 5+ years analog verification experience
- Proficiency with Cadence Virtuoso, Xcelium, APS/XPS
- Strong scripting skills in Shell, Perl, Python
- Experience with UVM testbench development
- Knowledge of AMS methodologies and simulators
Skills
Benefits
- Flexible work hours
- Health and wellness programs
- Professional development opportunities
- Employee resource groups
- Diversity and inclusion initiatives