Senior Principal Design Engineer

About the role

SoC Design Team at NXP Semiconductors focuses on building cutting‑edge system‑on‑chip architectures and integration methodologies. The Senior Principal Design Engineer leads SoC u‑Architecture, RTL integration, verification sign‑offs, and cross‑functional design enablement while mentoring engineers. Bangalore and Noida, India, on‑site work model.

What you’ll do

• Define and develop SoC architecture components
• Integrate RTL blocks and ensure design sign‑offs
• Conduct verification and synthesis validation
• Manage requirements traceability and compliance
• Collaborate with system architects and verification teams
• Oversee technical documentation processes
• Lead IP integration reviews and concurrent engineering efforts
• Drive design methodology improvements across global teams

What you’ll bring

• SoC u‑Architecture for clocking, reset, power management, security
• RTL integration using state‑of‑the‑art tools
• LINT/CDC/RDC sign‑offs for design quality
• Verification smokesuite and synthesis handoff checks
• Requirements management with IS026262 compliance
• Technical documentation oversight
• IP integration and BE report reviews
• Mentoring junior engineers

Skills