About the role

Lead Product Validation Engineer at Cadence in Noida. Drives design verification for complex digital systems, leveraging HDLs (Verilog, VHDL, SystemVerilog), C++, UVM, and EDA tools. Leads simulation and emulation, develops functional verification environments, and automates verification workflows with scripting. Validates SoC designs and protocols such as PCIe, USB3/4, and DP, debugging and resolving issues. Requires Electrical, Electronics, or Computer Science engineering background with 3‑6 years experience. Strong written, verbal, and presentation skills, collaborative mindset, and creative problem‑solving are essential. Works within Cadence’s “One Cadence – One Team” culture, supporting cross‑functional teams and delivering high‑quality validation solutions.

What you’ll do

Lead design verification using HDLs (Verilog/VHDL)
Simulate and emulate designs with EDA tools
Develop and script automation for verification
Create functional verification environments (SystemVerilog, UVM)
Verify complex SoC designs and protocols (PCIe, USB3/4, DP)
Debug and resolve verification issues

What you’ll bring

B.Tech/M.Tech/B.E./M.E. + 3-6 yrs experience

Skills

VerilogVHDLSystemVerilogC++UVMEDA ToolsScriptingSimulationEmulationFunctional VerificationSoC VerificationPCIeUSB3/4DP

Benefits

Employee-friendly policies for well-being
Career development and learning opportunities
Celebration of success
Collaborative One Cadence culture

Education

Bachelor's