Senior Staff ASIC Digital Engineer

About the role

Sandisk's SoC Development team seeks a Senior Staff ASIC Digital Engineer to architect and execute verification strategies for advanced controller SoCs in Bengaluru. The role involves end-to-end ownership of subsystem verification, mentoring junior engineers, and collaborating with cross-functional teams to validate complex hardware. This full-time position requires deep expertise in SystemVerilog UVM and bus protocols to support high-volume consumer and enterprise products.

What you’ll do

• End-to-end ownership of one or more subsystems or SoC verification flows, including planning, execution, and closure
• Mentor junior and mid-level engineers by reviewing test plans, code, and coverage
• Define verification strategy, create detailed test plans, and develop robust test benches
• Develop and run UVM/SystemVerilog-based verification environments
• Write, run, and debug C-based tests on SoCs requiring processor and embedded software knowledge
• Run, debug, and sign off gate-level simulations with SDF annotation
• Automate regression setup, execution, and result analysis using scripting languages
• Collaborate with architects, RTL designers, and pre- and post-silicon verification teams

What you’ll bring

• BE or MS degree in Electrical Engineering or Computer Engineering
• 13+ years of experience in ASIC/SoC verification
• Deep understanding of C, SystemVerilog UVM, and coverage-driven verification methodology
• Proven history of building and improving SV/UVM-based verification methodology
• Strong knowledge of bus protocols (AXI, AHB, APB) and interconnect fabrics
• Knowledge of interfaces such as PCIe, LPDDR, I²C, SPI, etc.
• Proficiency in gate-level simulations including SDF annotation and power-aware verification
• Proficiency in scripting languages such as Python, Perl, TCL, and Bash

Skills

Education

BE or MS degree in Electrical Engineering or Computer Engineering