Senior ASIC Digital Engineer, SOC Design

About the role

ASIC Development Engineering team at SanDisk drives cutting‑edge SoC solutions for flash memory products. The Senior ASIC Digital Engineer defines architecture, creates high‑quality Verilog/SystemVerilog RTL, and leads integration and debug of complex digital subsystems. Works on‑site in Bangalore, collaborating across design, verification, DFT, and hardware teams to deliver next‑generation semiconductor products.

What you’ll do

• Define and review SoC architecture and design specifications
• Develop synthesizable RTL and ensure robust design methodologies
• Drive cross‑functional collaboration with verification, DFT, physical design, and firmware teams
• Provide technical leadership and mentorship to engineering teams
• Lead integration and debug efforts for subsystem and full‑chip level
• Evaluate and integrate IP blocks into SoC designs
• Communicate project updates to stakeholders
• Guide design trade‑offs for area, performance, and power

What you’ll bring

• 5-8 years digital design experience
• Expertise in Verilog/SystemVerilog RTL
• Hands‑on SoC integration and top‑level bring‑up
• Strong knowledge of AMBA protocols (AXI/AHB/APB)
• Experience with synthesis, static timing analysis, and DFT
• Proficiency with EDA tools (simulation, lint, CDC, formal verification)
• Version control using Perforce or Git
• Excellent analytical and communication skills

Skills