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- BCurrent opening
PCIe Verification Engineer
BroadcomBroadcom Verification Team designs and validates high‑performance PCIe interfaces for next‑generation products. The engineer leads UVM‑based testbench development, creates test plans, and manages functional and code c…
Bangalore,IndiaOn-siteFull-timeReview matching role → - BCurrent opening
PCIe design Architect
BroadcomPCIe design Architect at Broadcom’s 4123 LSI India Research & Development Private Limited. Designs and architects SoC and PCIe subsystem solutions, focusing on PCIe Gen6/7 and PIPE protocols, AMBA, DMA, and memory org…
Bangalore,IndiaOn-siteFull-timeReview matching role → - SCurrent opening
Linux PCIe Driver Developer
SanDiskFirmware Engineering team at SanDisk builds high‑performance user‑space driver frameworks for the Next Gen Computational PCIe Flash Controller. The Linux PCIe Driver Developer designs scalable APIs, manages PCIe devic…
Bangalore,IndiaOn-siteFull-timeReview matching role → - MSCurrent opening
Senior Staff RTL Design Engineer, PCIe
Marvell Software Solutions IsraelMarvell Data Centre Engineering (DCE) - Compute & Storage (CCS) BU builds high‑performance data processing silicon platforms for cloud, carrier and automotive markets. The Senior Staff RTL Design Engineer defines PCIe…
Bangalore,IN,IndiaOn-siteFull-timeReview matching role → - BCurrent opening
PCIe Verification Engineer
BroadcomBroadcom Silicon Design team builds high‑performance connectivity solutions. The PCIe Verification Engineer creates UVM testbenches, develops test plans, reviews design specs, and drives functional and code coverage f…
Pune,IndiaOn-siteFull-timeReview matching role → - ALCurrent opening
Principal Design Verification Engineer, CXL / PCIe / Ethernet
Astera LabsDesign Verification CCE1 team at Astera Labs builds world‑class verification environments for AI‑focused connectivity IPs. The Principal Design Verification Engineer leads verification strategy, creates reusable UVM/S…
Bengaluru, Karnataka, IndiaFull-timeReview matching role → - RCurrent opening
Principal PCIe CXL RTL Design Engineer
RambusRambus’ PCIe, CXL IP design team builds next‑generation high‑performance interface IP to accelerate data center workloads. The Principal RTL Design Engineer leads architecture and micro‑architecture design, implements…
Bangalore,IndiaHybridFull-timeReview matching role → - SCurrent opening
Senior ASIC Digital Engineer, ASIC SOC Validation, PCIe
SanDiskASIC Development Engineering team at SanDisk builds high‑performance storage SoCs. The Senior ASIC Digital Engineer creates verification and validation plans, develops test environments, and leads end‑to‑end validatio…
Bangalore, Karnataka, IndiaOn-siteFull-timeReview matching role →
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