Senior Principal Engineer

About the role

Digital IP Verification team at NXP Semiconductors leads verification of complex digital IP and subsystems. The Senior Principal Engineer drives end-to-end verification execution, adopts advanced methodologies, owns quality metrics and mentors engineers across global design, DFT and validation groups. Noida, India, on-site work model.

What you’ll do

• Lead end-to-end verification for complex IPs and subsystems
• Develop and maintain testbench architecture and verification environments
• Define and track verification quality metrics
• Drive adoption of advanced verification methodologies
• Collaborate with design, DFT, architecture and validation teams
• Support pre-silicon and post-silicon validation activities
• Mentor junior engineers and influence technical direction
• Improve verification flow efficiency and predictability

What you’ll bring

• 15+ years verification experience
• Expertise in SystemVerilog/UVM
• Proficiency in C++
• Experience with VCS/NCSim/ModelSim/Questa
• Knowledge of Verilog/VHDL
• Familiarity with ARM/AHB/AXI protocols
• Understanding of memory subsystems
• Leadership and mentorship skills

Skills