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Hiring companyRambus

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Senior Principal Engineer, Signal Integrity

Bangalore, KA, IN Hybrid

About the role

Rambus is seeking a Senior Principal Engineer to join the SI/PI team within the Memory Interface Chips BU in Bangalore, India. You will lead modeling, analysis, and simulations of signal integrity (SI) and power integrity (PI) for the latest DDR product portfolio, collaborating with design, chip layout, package, and validation teams. The role also involves defining system design requirements, providing SI/PI guidelines based on simulation and silicon correlation, and working with customers to optimize solutions. Rambus offers a hybrid work environment, encouraging at least three days per week onsite.

What you’ll do

  • Create SI/PI methodologies and work with design & chip layout teams to do SI/PI study and package design for the latest DDR product portfolio
  • Work with package and validation team to define specifications and system design requirements such as packaging and PCB routings, IC-PKG-BRD decoupling requirements, channel simulations and jitter sen
  • Provide guidelines based on SI/PI study and simulation and silicon correlation so that products will have superior SI performance
  • Work with customers to collaborate and find the optimum SI/PI solution
  • Help the team during debug and bring up in lab if needed

What you’ll bring

  • BE or MS or MTech in Electrical Engineering
  • 12+ years of industry experience
  • Solid background in SI/PI and package design
  • Prior experience simulating high speed memory (DDR4, DDR5) and/or SERDES interfaces
  • Solid theoretical background in EM and transmission line theory
  • Strong understanding of equalization techniques such as FIR/FFE/DFE/CTLE
  • Must understand package and PCB design and be able to use APD/Allegro layout files
  • Proficient with simulations using Spice and ADS

Nice to have

  • On-Die PDN design exposure
  • Strong understanding of the server system, from CPUs to DRAMs on DIMM modules

Skills

SI/PIPackage DesignDDR4DDR5SERDESEMTransmission Line TheoryEqualization Techniques

Benefits

Competitive compensation package including base salary, bonus, equity and employee benefits

Education

BE or MS or MTech in Electrical Engineering