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Hiring companyCadence Design Systems

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Lead Solutions Engineer

AHMEDABAD, India Full-time On-site

About the role

Lead Solutions Engineer at Cadence Design Systems will design and implement verification strategies for SOCs. Responsibilities include reviewing design specifications, creating test plans, developing constrained random verification environments, writing SystemVerilog/UVM testbenches, and generating C-based test cases. Candidates must have strong functional verification fundamentals, SystemVerilog and UVM experience, proficiency in Verilog/VHDL/C/C++/Perl/Python, and expertise in AMBA protocols and other industry protocols such as USB, PCIe, Ethernet, DDR, LPDDR. Version control and load sharing skills are required. Desired experience includes Cadence tools, ARM/CPU architecture familiarity, assembly programming, UART/I2C/SPI/JTAG knowledge, embedded C debugging, and formal verification. The role demands excellent communication, organization, and presentation skills, independence, and a willingness to learn and grow. Cadence offers a dynamic, fast-paced environment for engineers to contribute to cutting-edge semiconductor solutions.

What you’ll do

  • Review design specs and develop verification strategy, test plan, coverage plan
  • Develop constrained random verification environments and components
  • Write tests, sequences, coverage, assertions to meet verification goals
  • Create C-based test cases for SOC verification
  • Strong communication, organization, planning, presentation skills
  • Work independently, deliver high-quality output in fast-paced environment
  • Learn new methodologies, languages, protocols
  • Open to personal development and growth
  • Self-motivated, take additional responsibilities for team success

What you’ll bring

  • Functional verification fundamentals, environment planning, test plan generation
  • SystemVerilog and UVM environment development experience
  • Proficient in Verilog/VHDL/C/C++/Perl/Python
  • Expertise in AMBA protocols (AXI/AHB/APB)
  • Knowledge of USB/PCIe/Ethernet/DDR/LPDDR protocols
  • Version control software proficiency
  • Load sharing software proficiency

Nice to have

  • Cadence tools and flows experience
  • ARM/CPU architecture familiarity
  • C-based SOC verification test case development
  • Assembly language programming experience
  • Knowledge of UART/I2C/SPI/JTAG protocols
  • Embedded C code development and debugging
  • Formal verification experience

Skills

Functional VerificationEnvironment PlanningTest Plan GenerationSystemVerilogUVMVerilogVHDLCC++PerlPythonAMBA ProtocolsAXIAHBAPBUSBPCIeEthernetDDRLPDDRVersion ControlLoad SharingCadence ToolsARM ArchitectureCPU ArchitectureSOC VerificationAssemblyUARTI2CSPIJTAGEmbedded CFormal Verification