Senior Engineer I, Physical Design

About the role

DSPIC Business Unit Physical Design team at Microchip Technology designs next‑generation microcontroller SOCs. The engineer drives mixed‑signal, low‑power physical implementation from floorplanning through GDSII delivery, conducts power integrity and timing closure, and enhances design flow. Bangalore, India, on‑site role focusing on advanced FLASH processes and cross‑functional collaboration.

What you’ll do

• Implement mixed‑signal, low‑power designs using FLASH processes
• Perform floorplan, power grid, placement, and timing optimization
• Manage clock tree synthesis and post‑route timing closure
• Conduct power integrity, IR drop, and electromigration sign‑off
• Develop and document physical design flow and methodology
• Execute DRC/LVS verification and metal‑only ECOs
• Collaborate with IP, CAD vendors, synthesis, and DFT teams

What you’ll bring

• Bachelor or Master in Electrical/Electronic Engineering
• 5+ years physical design experience
• Proficiency with Innovus/Fusion Compiler, Calibre, Redhawk
• Scripting in TCL, PERL, Shell
• Knowledge of Verilog and VHDL

Skills

Education

Bachelor of Engineering in Electrical/Electronic Engineering or Master of Engineering