Verified 6 days ago
Infra Design Verification Sr Lead Engineer
About the role
Hardware Engineering at Qualcomm designs and verifies cutting-edge electronic systems for next-generation products. The Senior Lead Engineer develops UVM-based verification environments, creates verification plans for high‑speed interconnect protocols, and drives verification closure through coverage and assertion‑based methods while mentoring junior engineers. Bangalore, India, on-site.
What you’ll do
- Develop and maintain UVM verification environments
- Create and execute verification plans for PCIe, CXL, AXI, CHI
- Perform block‑level and top‑level verification with coverage and assertions
- Collaborate with RTL designers and architects
- Mentor junior engineers and improve verification methodology
- Debug RTL and gate‑level simulation failures
What you’ll bring
Bachelor's degree in Computer Science, Electrical/Electronics Engineering or related field
Nice to have
- 3+ years hardware engineering experience
- UVM and SystemVerilog expertise
- PCIe, CXL, AXI protocol knowledge
- Perl/Python/Tcl scripting proficiency
- Experience with Synopsys/Mentor VIPs
Skills
Education
Bachelor's degree in Computer Science, Electrical/Electronics Engineering or related field