Senior Physical Design Engineer

About the role

EnCharge AI Advanced Silicon Team designs cutting-edge AI hardware for edge-to-cloud computing. The Senior Physical Design Engineer leads block-level RTL-to-GDSII implementation, optimizes PPA, and automates flows using Tcl and Python. Bangalore, hybrid work model, relocation assistance available.

What you’ll do

• Lead physical implementation of complex blocks from synthesis to sign‑off
• Develop and optimize PPA recipes through deep‑dive analysis
• Automate repetitive tasks with Tcl/Python scripts
• Converge partitions from RTL to clean GDSII with minimal supervision
• Collaborate with RTL and DFT teams to left‑shift physical constraints

What you’ll bring

• 4-7 years physical design experience
• 2-3 successful tape-outs
• Cadence Innovus/Tempus expertise
• Proficiency in Tcl and Python
• PPA optimization skills
• STA, EM/IR, DRC/LVS debugging

Nice to have

• 4-7 years physical design experience
• 2-3 successful tape-outs
• Cadence Innovus/Tempus expertise
• Proficiency in Tcl and Python
• PPA optimization skills
• STA, EM/IR, DRC/LVS debugging

Skills