Verified today
Sr Principal Design Engineer
About the role
Analog and Mixed Signal design team at Cadence focuses on high‑speed D2D and SERDES product development. The Sr Principal Design Engineer leads design of CMOS SERDES and high‑speed I/O IC blocks from concept through verification, collaborating with layout engineers and global technical leads. Based in Bangalore, on‑site role with cross‑time‑zone team interaction.
What you’ll do
- Design high‑speed D2D and SERDES products on advanced nodes
- Develop analog/mixed‑signal IC blocks from spec to verification
- Coordinate with layout design engineers for IC block integration
- Collaborate with global technical leads on circuit design and SERDES architecture
What you’ll bring
- 8+ years CMOS design experience
- Expertise in SERDES circuit blocks (Driver, Receiver, Serializer, etc.)
- Strong understanding of jitter and signal equalization
- Proficiency with CAD simulation and layout tools
Nice to have
BEng/MEng/PhD in Electrical Engineering or related field